enhance new niolib plugin to accept True/False for pad direction (rather than a signal)
jean-paul, so that there is no need to add two special signals (which are hard-wired to IOVSS and IOVDD), can we do this:
index 200a9537..55d5f9e1 100644
--- a/cumulus/src/plugins/alpha/core2chip/core2chip.py
+++ b/cumulus/src/plugins/alpha/core2chip/core2chip.py
@@ -390,11 +390,15 @@ class CoreToChip ( object ):
@property
def enableNet ( self ):
+ enable = None
if self.flags & IoPad.BIDIR:
- return self.coreNets[2]
+ enable = self.coreNets[2]
elif self.flags & IoPad.TRI_OUT:
- return self.coreNets[1]
- return None
+ enable = self.coreNets[1]
+ # test if a boolean was given: if so, return VSS if True, else VDD
+ if isinstance(enable, bool):
+ enable = 'iovss' if enable else 'iovdd'
+ return enable
then, in cumulus/src/plugins/alpha/core2chip/core2chip.py it will go "oh, i will append iovss/iovdd to connexions for you"
+ else:
+ for ioNet in self.nets:
+ if not ioNet.isEnable():
+ ioNet.setFlags( IoNet.DoExtNet )
+ ioNet.buildNets()
+ connexions.append( ( self.nets[0].chipExtNet, padInfo.padNet ) )
+ if self.direction == IoPad.IN:
+ connexions.append( ( self.nets[0].chipIntNet, padInfo.inputNet ) )
+ elif self.direction == IoPad.OUT:
+ connexions.append( ( self.nets[0].chipIntNet, padInfo.outputNet ) )
+ elif self.direction == IoPad.TRI_OUT:
+ connexions.append( ( self.nets[0].chipIntNet, padInfo.inputNet ) )
+ connexions.append( ( self.nets[1].chipIntNet, padInfo.enableNet ) )
+ elif self.direction == IoPad.BUDIR:
+ connexions.append( ( self.nets[0].chipIntNet, padInfo.inputNet ) )
+ connexions.append( ( self.nets[1].chipIntNet, padInfo.outputNet ) )
+ connexions.append( ( self.nets[2].chipIntNet, padInfo.enableNet ) )
then, here, the connection will be made for each IOpad to a hard-wired input or hard-wired output:
+ for connexion in connexions:
+ CoreToChip._connect( self.pads[0], connexion[0], connexion[1] )
would that work?